1. Field of the Invention
The present invention relates to an apparatus for testing electronic devices such as semiconductor devices.
2. Description of the Related Art
As is shown in FIG. 1, a method of manufacturing a semiconductor integrated circuit (IC) comprises two major steps. The first major step includes the pre-processing step 1 of forming IC chips on a semiconductor wafer. The second major step includes the post-processing step 3 of sealing each IC chip within a package made of resin, thus forming a semiconductor device. The pre-processing step 1 is followed by a step 2 known as "die sorter test," in which the IC chips are tested, lot by lot. The post-processing step 3 is followed by a step 4 known as "product test," in which the semiconductor devices are tested, lot by lot. Further, a step 5, or a random-sampling test, is carried out after the product test to determine the quality of some selected ones of the semiconductor devices.
More specifically, the die sorter test includes a DC test for checking the static characteristics of the IC chips, and an AC test for determining the gains and noises of the amplifiers incorporated in each IC chip. The IC chips, which have passed the die sorter test, are subjected to the post-processing step 3, and made into semiconductor devices. A DC test and an AC test, both similar to those conducted in the die sorter test, are performed in both the product test and the random-sampling test.
A so-called "semiconductor tester" is used in all tests mentioned above. The semiconductor tester is controlled in accordance with the test programs, each test program being prepared for testing semiconductor devices of a specific type.
The die sorter test, the product test, and the random-sampling test are carried out on IC chips and semiconductor devices, lot by lot. Hence, the products of any lot which is subjected to the random-sampling test, as well as the die sorter test and the product test, undergo the same test three times. These tests are conducted, each for 100 to 500 items, since most semiconductor devices being manufactured at present have various functions to perform and have complex circuit structure. Further, a complex and, hence, expensive instrument is needed to check each item of test. Hence, the cost of testing the devices is substantial, and is reflected in the price of the devices.
A possible method of reducing the test cost is to reduce the number of test items. If this method is used, however, the ratio of defective and unreliable products will increase.